SF Prep Notes

Next phase of chip design scheme to target at least 50 fabless semiconductor companies

Meeting chip design firms under the Design Linked Incentive (DLI) Scheme on 27 January 2026, IT Minister Ashwini Vaishnaw set a target of enabling at least 50 fabless semiconductor companies in the next phase and announced Deep Tech Awards in 2026.

Summary

Union Minister Ashwini Vaishnaw interacted with semiconductor chip design companies approved under the Design Linked Incentive (DLI) Scheme of the Semicon India Programme in New Delhi. The next phase aims to enable at least 50 fabless semiconductor companies, with focus on six design domains: compute systems, RF, networking, power management, sensors and memory. The government will also institute Deep Tech Awards in 2026. DLI-supported firms are working on indigenous SoCs and ASICs for surveillance, networking and embedded systems.

Key facts

Date
27 January 2026
Scheme
Design Linked Incentive (DLI), Semicon India Programme
Next-phase target
At least 50 fabless semiconductor companies
Six domains
Compute systems, RF, networking, power management, sensors, memory
New award
Deep Tech Awards in 2026

Practice MCQs 2 questions

Q1 Advanced

Under the next phase of the Design Linked Incentive (DLI) Scheme, the government aims to enable at least how many fabless semiconductor companies?

Show answer

Correct answer: C — 50

PIB (MeitY): target of enabling at least 50 fabless semiconductor companies in the next phase.

Q2 Advanced

Which of the following is NOT among the six key semiconductor design domains identified for the next phase of the DLI Scheme?

Show answer

Correct answer: C — Display Panels

PIB (MeitY): the six domains are Compute Systems, RF, Networking, Power Management, Sensors and Memory.

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