MeitY and Drone Federation India launch NIDAR 2.0
MeitY and Drone Federation India launched NIDAR 2.0, the second edition of the National Innovation Challenge for Drone Application and Research, on 13 July 2026, asking students to build drones around India's VEGA processor.
Summary
The Ministry of Electronics and Information Technology (MeitY) and Drone Federation India (DFI) launched NIDAR 2.0 (2026-27), the second edition of the National Innovation Challenge for Drone Application and Research, under the SwaYaan initiative at Electronics Niketan, New Delhi, on 13 July 2026. MeitY Secretary S. Krishnan released the problem statements; one track asks teams to build swarm and GPS-denied drones, and another to design an indigenous flight controller around the VEGA processor. The prize pool has grown to over ₹65 lakh. VEGA is a family of indigenous RISC-V microprocessors designed by C-DAC under MeitY's Microprocessor Development Programme. The first edition, launched in March 2025, drew 3,448 students from 22 States and 4 Union Territories, and 24 teams won prizes worth ₹40 lakh.
Key facts
- Launched
- 13 July 2026, Electronics Niketan, New Delhi
- Organisers
- MeitY and Drone Federation India, under SwaYaan
- Tracks
- Drone Innovation; Component Innovation (VEGA-based flight controller)
- Prize pool
- Over ₹65 lakh
- Static link
- VEGA: indigenous RISC-V processors by C-DAC under MeitY's Microprocessor Development Programme
- First edition
- Launched March 2025; 3,448 students; 24 teams won ₹40 lakh
Practice MCQs 2 questions
NIDAR 2.0, launched by MeitY in July 2026, is a national innovation challenge in which field?
Show answer
Correct answer: B — Drone application and research
NIDAR stands for National Innovation Challenge for Drone Application and Research.
The VEGA processor, around which NIDAR 2.0 teams must design a flight controller, is based on which architecture and developed by which body?
Show answer
Correct answer: C — RISC-V architecture; C-DAC
VEGA is a family of indigenous microprocessors designed by C-DAC under MeitY's Microprocessor Development Programme, based on the open-standard RISC-V architecture.