23 chip-design projects sanctioned under Design Linked Incentive scheme
On 30 July 2025, MeitY said 23 chip-design projects had been sanctioned under the ₹1,000-crore Design Linked Incentive (DLI) scheme of the ₹76,000-crore Semicon India Programme.
Summary
The Ministry of Electronics and IT said on 30 July 2025 that 23 chip-design projects had been sanctioned for financial support under the Design Linked Incentive (DLI) Scheme. The DLI Scheme, with an outlay of ₹1,000 crore, is part of the ₹76,000-crore Semicon India Programme and supports domestic companies, startups and MSMEs in semiconductor design. It offers design infrastructure such as EDA tools and IP cores, a financial incentive of up to 50% of eligible costs capped at ₹15 crore per application, and deployment-linked incentives of 6% to 4% of net sales over five years capped at ₹30 crore. Under DLI, 278 academic institutions and 72 startups have access to EDA tools, and 20 chip designs from 17 academic institutions have been fabricated at SCL, Mohali.
Key facts
- Announced
- 30 July 2025, MeitY
- Projects sanctioned
- 23
- DLI outlay
- ₹1,000 crore
- Semicon India Programme
- ₹76,000 crore
- Product incentive
- Up to 50% of eligible cost, max ₹15 crore per application
- Deployment incentive
- 6%–4% of net sales over 5 years, max ₹30 crore
- EDA access
- 278 academic institutions, 72 startups
- Fabricated
- 20 designs from 17 institutions at SCL Mohali
Practice MCQs 3 questions
How many chip-design projects had been sanctioned under the Design Linked Incentive scheme, as stated by MeitY on 30 July 2025?
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Correct answer: D — 23
MeitY said 23 chip-design projects had been sanctioned under DLI.
What is the outlay of the Design Linked Incentive (DLI) scheme under the Semicon India Programme?
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Correct answer: B — ₹1,000 crore
The DLI scheme has an outlay of ₹1,000 crore within the ₹76,000-crore Semicon India Programme.
Consider the following statements about the Design Linked Incentive scheme: 1. It offers a product design incentive of up to 50% of eligible costs, capped at ₹15 crore per application. 2. Chip designs from academic institutions under the scheme have been fabricated at SCL, Mohali. Which of the statements given above is/are correct?
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Correct answer: C — Both 1 and 2
Both are correct: the cap is ₹15 crore per application, and 20 designs from 17 institutions were fabricated at SCL, Mohali.